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cy29fct520t multilevel pipeline register with 3-state outputs sccs011c ? may 1994 ? revised november 2001 1 post office box 655303 ? dallas, texas 75265 function, pinout, and drive compatible with fct, f logic, and am29520 reduced v oh (typically = 3.3 v) version of equivalent fct functions edge-rate control circuitry for significantly improved noise characteristics i off supports partial-power-down mode operation matched rise and fall times fully compatible with ttl input and output logic levels esd protection exceeds jesd 22 ? 2000-v human-body model (a114-a) ? 200-v machine model (a115-a) ? 1000-v charged-device model (c101) single- and dual-pipeline operation modes multiplexed data inputs and outputs cy29fct520t ? 64-ma output sink current 32-ma output source current CY29FCT520ATDMB, cy29fct520btdmb ? 32-ma output sink current 12-ma output source current 3-state outputs description the cy29fct520t is a multilevel 8-bit-wide pipeline register. the device consists of four registers, a1, a2, b1, and b2, which are configured by the instruction inputs i 0 , i 1 as a single four-level pipeline or as two two-level pipelines. the contents of any register can be read at the multiplexed output at any time by using the multiplex-selection controls (s 0 and s 1 ). the pipeline registers are positive-edge triggered, and data is shifted by the rising edge of the clock input. instruction i = 0 selects the four-level pipeline mode. instruction i = 1 selects the two-level b pipeline, while i = 2 selects the two-level a pipeline. i = 3 is the hold instruction; no shifting is performed by the clock in this mode. in the two-level operation mode, data is shifted from level 1 to level 2 and new data is loaded into level 1. this device is fully specified for partial-power-down applications using i off . the i off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. copyright ? 2001, texas instruments incorporated production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. i 0 i 1 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 clk gnd d, p, or so package (top view) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v cc s 0 s 1 y 0 y 1 y 2 y 3 y 4 y 5 y 6 y 7 oe on products compliant to mil-prf-38535, all parameters are tested unless otherwise noted. on all other products, production processing does not necessarily include testing of all parameters.
cy29fct520t multilevel pipeline register with 3-state outputs sccs011c ? may 1994 ? revised november 2001 2 post office box 655303 ? dallas, texas 75265 pipeline instruction table i = 0 i = 1 i = 2 i = 3 i 1 = 0 i 0 = 0 i 1 = 0 i 0 = 1 i 1 = 1 i 0 = 0 i 1 = 1 i 0 = 1 a1 a2 b1 b2 a1 a2 b1 b2 a1 a2 b1 b2 b1 b2 a1 a2 single four-level dual two-level hold ordering information t a package ? speed (ns) orderable part number top-side marking soic so tube 6.0 cy29fct520ctsoc 29fct520c soic ? so tape and reel 6.0 cy29fct520ctsoct 29fct520c soic so tube 7.5 cy29fct520btsoc 29fct520b ? 40 c to 85 c soic ? so tape and reel 7.5 cy29fct520btsoct 29fct520b dip ? p tube 14.0 cy29fct520atpc cy29fct520atpc soic so tube 14.0 cy29fct520atsoc 29fct520a soic ? so tape and reel 14.0 cy29fct520atsoct 29fct520a 55 cto125 c cdip d tube 8.0 5962-9220504mla (cy29fct520btdmb) ? 55 c to 125 c cdip ? d tube 16.0 5962-9220502mla (CY29FCT520ATDMB) ? package drawings, standard packing quantities, thermal data, symbolization, and pcb design guidelines are available at www.ti.com/sc/package. function table inputs output s 1 s 0 output 1 1 a1 1 0a2 0 1b1 0 0 b2
cy29fct520t multilevel pipeline register with 3-state outputs sccs011c ? may 1994 ? revised november 2001 3 post office box 655303 ? dallas, texas 75265 logic diagram mux mux octal register a1 register controls instruction i 0 i 1 clk s 0 s 1 d 0 ? d 7 y 0 ? y 7 oe octal register a2 octal register b1 octal register b2 mux 8 8 selection multiplex absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range to ground potential ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dc input voltage range ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dc output voltage range ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dc output current (maximum sink current/pin) 120 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, ja (see note 1): p package 67 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 2): so package 46 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ambient temperature range with power applied, t a ? 65 c to 135 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ? 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ? recommended operating conditions ? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the package thermal impedance is calculated in accordance with jesd 51-3. 2. the package thermal impedance is calculated in accordance with jesd 51-7.
cy29fct520t multilevel pipeline register with 3-state outputs sccs011c ? may 1994 ? revised november 2001 4 post office box 655303 ? dallas, texas 75265 recommended operating conditions (see note 3) CY29FCT520ATDMB cy29fct520btdmb cy29fct520t unit min nom max min nom max v cc supply voltage 4.5 5 5.5 4.75 5 5.25 v v ih high-level input voltage 2 2 v v il low-level input voltage 0.8 0.8 v i oh high-level output current ? 12 ? 32 ma i ol low-level output current 32 64 ma t a operating free-air temperature ? 55 125 ? 40 85 c note 3: all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions CY29FCT520ATDMB cy29fct520btdmb cy29fct520t unit min typ ? max min typ ? max v ik v cc = 4.5 v, i in = ? 18 ma ? 0.7 ? 1.2 v v ik v cc = 4.75 v, i in = ? 18 ma ? 0.7 ? 1.2 v v cc = 4.5 v, i oh = ? 12 ma 2.4 3.3 v oh v cc = 4 75 v i oh = ? 15 ma 2.4 3.3 v v cc = 4 . 75 v i oh = ? 32 ma 2 v ol v cc = 4.5 v, i ol = 32 ma 0.3 0.55 v v ol v cc = 4.75 v, i ol = 64 ma 0.3 0.55 v v hys all inputs 0.2 0.2 v i i v cc = 5.5 v, v in = v cc 5 a i i v cc = 5.25 v, v in = v cc 5 a i ih v cc = 5.5 v, v in = 2.7 v 1 a i ih v cc = 5.25 v, v in = 2.7 v 1 a i il v cc = 5.5 v, v in = 0.5 v 1 a i il v cc = 5.25 v, v in = 0.5 v 1 a i off v cc = 0 v, v out = 4.5 v 1 1 a i ? v cc = 5.5 v, v out = 0 v ? 60 ? 120 ? 225 ma i os ? v cc = 5.25 v, v out = 0 v ? 60 ? 120 ? 225 ma i ozh v cc = 5.5 v, v in = 2.7 v 10 a i ozh v cc = 5.25 v, v in = 2.7 v 10 a i ozl v cc = 5.5 v, v in = 0.5 v ? 10 a i ozl v cc = 5.25 v, v in = 0.5 v ? 10 a i cc v cc = 5.5 v, v in 0.2 v, v in v cc ? 0.2 v 0.1 0.2 ma i cc v cc = 5.25 v, v in 0.2 v, v in v cc ? 0.2 v 0.1 0.2 ma ? i cc v cc = 5.5 v, v in = 3.4 v , f 1 = 0, outputs open 0.5 2 ma ? i cc v cc = 5.25 v, v in = 3.4 v , f 1 = 0, outputs open 0.5 2 ma ? typical values are at v cc = 5 v, t a = 25 c. ? not more than one output should be shorted at a time. duration of short should not exceed one second. the use of high-speed tes t apparatus and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational valu es. otherwise, prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parame tric tests. in any sequence of parameter tests, i os tests should be performed last. per ttl-driven input (v in = 3.4 v); all other inputs at v cc or gnd
cy29fct520t multilevel pipeline register with 3-state outputs sccs011c ? may 1994 ? revised november 2001 5 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued) parameter test conditions CY29FCT520ATDMB cy29fct520btdmb cy29fct520t unit min typ ? max min typ ? max i ? v cc = 5.5 v, outputs open, one bit switching at 50% duty cycle, oe = gnd, v in 0.2 v or v in v cc ? 0.2 v 0.06 0.12 ma/ i ccd ? v cc = 5.25 v, outputs open, one bit switching at 50% duty cycle, oe = gnd, v in 0.2 v or v in v cc ? 0.2 v 0.06 0.12 mhz # one bit switching at f 1 = 5 mhz at v in 0.2 v or v in v cc ? 0.2 v 0.7 1.4 # v cc = 5.5 v, out p uts o p en 1 50% duty cycle v in = 3.4 v or gnd 1.2 3.4 # out uts oen , f 0 = 10 mhz, oe = gnd eight bits switching at f 1 = 5 mhz at v in 0.2 v or v in v cc ? 0.2 v 2.8 5.6 || i c # f 1 = 5 mhz at 50% duty cycle v in = 3.4 v or gnd 5.1 14.3 || ma i c # one bit switching at f 1 = 5 mhz at v in 0.2 v or v in v cc ? 0.2 v 0.7 1.4 ma v cc = 5.25 v, out p uts o p en 1 50% duty cycle v in = 3.4 v or gnd 1.2 3.4 out uts oen , f 0 = 10 mhz, oe = gnd eight bits switching at f 1 = 5 mhz at v in 0.2 v or v in v cc ? 0.2 v 2.8 5.6 || f 1 = 5 mhz at 50% duty cycle v in = 3.4 v or gnd 5.1 14.3 || c i 5 10 5 10 pf c o 9 12 9 12 pf ? typical values are at v cc = 5 v, t a = 25 c. ? this parameter is derived for use in total power-supply calculations. # i c = i cc + ? i cc d h n t + i ccd (f 0 /2 + f 1 n 1 ) where: i c = total supply current i cc = power-supply current with cmos input levels ? i cc = power-supply current for a ttl high input (v in = 3.4 v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f 0 = clock frequency for registered devices, otherwise zero f 1 = input signal frequency n 1 = number of inputs changing at f 1 all currents are in milliamperes and all frequencies are in megahertz. || values for these conditions are examples of the i cc formula.
cy29fct520t multilevel pipeline register with 3-state outputs sccs011c ? may 1994 ? revised november 2001 6 post office box 655303 ? dallas, texas 75265 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see figure 1) CY29FCT520ATDMB cy29fct520btdmb unit min max min max unit t w pulse duration, clk high or low 8 6 ns t s t ti b f clk timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see figure 1) cy29fct520at cy29fct520bt cy29fct520ct unit min max min max min max unit t w pulse duration, clk high or low 7 5.5 5.5 ns t s t ti b f clk switching characteristics over operating free-air temperature range (see figure 1) parameter from to CY29FCT520ATDMB cy29fct520btdmb unit parameter (input) (output) min max min max unit t plh clk y 2 16 2 8 ns t phl clk y 2 16 2 8 ns t plh s 0 or s 1 y 2 15 2 8 ns t phl s 0 or s 1 y 2 15 2 8 ns t phz oe y 1.5 13 1.5 7.5 ns t plz oe y 1.5 13 1.5 7.5 ns t pzh oe y 1.5 16 1.5 8 ns t pzl oe y 1.5 16 1.5 8 ns switching characteristics over operating free-air temperature range (see figure 1) parameter from to cy29fct520at cy29fct520bt cy29fct520ct unit parameter (input) (output) min max min max min max unit t plh clk y 2 14 2 7.5 2 6 ns t phl clk y 2 14 2 7.5 2 6 ns t plh s 0 or s 1 y 2 13 2 7.5 2 6 ns t phl s 0 or s 1 y 2 13 2 7.5 2 6 ns t phz oe y 1.5 12 1.5 7 1.5 6 ns t plz oe y 1.5 12 1.5 7 1.5 6 ns t pzh oe y 1.5 15 1.5 7.5 1.5 6 ns t pzl oe y 1.5 15 1.5 7.5 1.5 6 ns
cy29fct520t multilevel pipeline register with 3-state outputs sccs011c ? may 1994 ? revised november 2001 7 post office box 655303 ? dallas, texas 75265 parameter measurement information 3 v 3 v 0 v 0 v t h t su voltage waveforms setup and hold times data input t plh t phl t phl t plh v oh v oh v ol v ol 3 v 0 v input out-of-phase output in-phase output timing input voltage waveforms propagation delay times inverting and noninverting outputs output control output waveform 1 (see note b) output waveform 2 (see note b) v ol v oh t pzl t pzh t plz t phz 3.5 v 0 v v ol + 0.3 v 0 v 3 v voltage waveforms enable and disable times low- and high-level enabling t plh /t phl t plz /t pzl t phz /t pzh open 7 v open test s1 3 v 0 v t w voltage waveforms pulse duration input notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. the outputs are measured one at a time with one input transition per measurement. from output under test c l = 50 pf (see note a) load circuit for 3-state outputs s1 7 v 500 ? gnd from output under test c l = 50 pf (see note a) test point load circuit for totem-pole outputs open v oh ? 0.3 v 500 ? 500 ? 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v figure 1. load circuit and voltage waveforms
package option addendum www.ti.com 15-apr-2017 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples 5962-9220502mla active cdip jt 24 1 tbd a42 n / a for pkg type -55 to 125 5962-9220502ml a 5962-9220504mla active cdip jt 24 1 tbd a42 n / a for pkg type -55 to 125 5962-9220504ml a cy29fct520atsoc active soic dw 24 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 29fct520a cy29fct520btsoc active soic dw 24 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 29fct520b (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width.
package option addendum www.ti.com 15-apr-2017 addendum-page 2 important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
mechanical data mcer004a january 1995 revised january 1997 post office box 655303 ? dallas, texas 75265 jt (r-gdip-t**) ceramic dual-in-line 24 leads shown 4040110/c 08/96 b 0.200 (5,08) max 0.320 (8,13) 0.290 (7,37) 0.130 (3,30) min 0.008 (0,20) 0.014 (0,36) seating plane 13 12 0.030 (0,76) 0.070 (1,78) 0.015 (0,38) min a 24 1 0.100 (2,54) max 0.023 (0,58) 0.015 (0,38) 0.100 (2,54) 0 15 1.440 (37,08) 1.460 0.285 (7,39) 0.291 (36,58) (7,24) 28 pins ** 1.280 1.240 0.300 0.245 (7,62) dim b max a max a min b min (6,22) 24 (32,51) (31,50) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a ceramic lid using glass frit. d. index point is provided on cap for terminal identification. e. falls within mil std 1835 gdip3-t24, gdip4-t28, and jedec mo-058 aa, mo-058 ab

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